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Add support for ARM dot product instructions
The sdot instruction computes (and accumulates) a signed dot product, which is quite handy for Stockfish's NNUE code. The instruction is optional for Armv8.2 and Armv8.3, and mandatory for Armv8.4 and above. The commit adds a new 'arm-dotprod' architecture with enabled dot product support. It also enables dot product support for the existing 'apple-silicon' architecture, which is at least Armv8.5. The following local speed test was performed on an Apple M1 with ARCH=apple-silicon. I had to remove CPU pinning from the benchmark script. However, the results were still consistent: Checking both binaries against themselves reported a speedup of +0.0000 and +0.0005, respectively. ``` Result of 100 runs ================== base (...ish.037ef3e1) = 1917997 +/- 7152 test (...fish.dotprod) = 2159682 +/- 9066 diff = +241684 +/- 2923 speedup = +0.1260 P(speedup > 0) = 1.0000 CPU: 10 x arm Hyperthreading: off ``` Fixes #4193 closes https://github.com/official-stockfish/Stockfish/pull/4400 No functional change
This commit is contained in:
Sebastian Buchwald
Joost VandeVondele
parent
037ef3e18d
commit
b4ad3a3c4b
3 changed files with 78 additions and 24 deletions
65
src/Makefile
65
src/Makefile
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@ -69,32 +69,33 @@ VPATH = syzygy:nnue:nnue/features
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### Section 2. High-level Configuration
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### ==========================================================================
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#
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# flag --- Comp switch --- Description
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# flag --- Comp switch --- Description
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# ----------------------------------------------------------------------------
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#
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# debug = yes/no --- -DNDEBUG --- Enable/Disable debug mode
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# debug = yes/no --- -DNDEBUG --- Enable/Disable debug mode
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# sanitize = none/<sanitizer> ... (-fsanitize )
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# --- ( undefined ) --- enable undefined behavior checks
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# --- ( thread ) --- enable threading error checks
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# --- ( address ) --- enable memory access checks
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# --- ...etc... --- see compiler documentation for supported sanitizers
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# optimize = yes/no --- (-O3/-fast etc.) --- Enable/Disable optimizations
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# arch = (name) --- (-arch) --- Target architecture
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# bits = 64/32 --- -DIS_64BIT --- 64-/32-bit operating system
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# prefetch = yes/no --- -DUSE_PREFETCH --- Use prefetch asm-instruction
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# popcnt = yes/no --- -DUSE_POPCNT --- Use popcnt asm-instruction
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# pext = yes/no --- -DUSE_PEXT --- Use pext x86_64 asm-instruction
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# sse = yes/no --- -msse --- Use Intel Streaming SIMD Extensions
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# mmx = yes/no --- -mmmx --- Use Intel MMX instructions
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# sse2 = yes/no --- -msse2 --- Use Intel Streaming SIMD Extensions 2
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# ssse3 = yes/no --- -mssse3 --- Use Intel Supplemental Streaming SIMD Extensions 3
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# sse41 = yes/no --- -msse4.1 --- Use Intel Streaming SIMD Extensions 4.1
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# avx2 = yes/no --- -mavx2 --- Use Intel Advanced Vector Extensions 2
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# avxvnni = yes/no --- -mavxvnni --- Use Intel Vector Neural Network Instructions AVX
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# avx512 = yes/no --- -mavx512bw --- Use Intel Advanced Vector Extensions 512
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# vnni256 = yes/no --- -mavx512vnni --- Use Intel Vector Neural Network Instructions 256
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# vnni512 = yes/no --- -mavx512vnni --- Use Intel Vector Neural Network Instructions 512
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# neon = yes/no --- -DUSE_NEON --- Use ARM SIMD architecture
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# --- ( undefined ) --- enable undefined behavior checks
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# --- ( thread ) --- enable threading error checks
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# --- ( address ) --- enable memory access checks
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# --- ...etc... --- see compiler documentation for supported sanitizers
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# optimize = yes/no --- (-O3/-fast etc.) --- Enable/Disable optimizations
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# arch = (name) --- (-arch) --- Target architecture
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# bits = 64/32 --- -DIS_64BIT --- 64-/32-bit operating system
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# prefetch = yes/no --- -DUSE_PREFETCH --- Use prefetch asm-instruction
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# popcnt = yes/no --- -DUSE_POPCNT --- Use popcnt asm-instruction
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# pext = yes/no --- -DUSE_PEXT --- Use pext x86_64 asm-instruction
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# sse = yes/no --- -msse --- Use Intel Streaming SIMD Extensions
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# mmx = yes/no --- -mmmx --- Use Intel MMX instructions
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# sse2 = yes/no --- -msse2 --- Use Intel Streaming SIMD Extensions 2
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# ssse3 = yes/no --- -mssse3 --- Use Intel Supplemental Streaming SIMD Extensions 3
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# sse41 = yes/no --- -msse4.1 --- Use Intel Streaming SIMD Extensions 4.1
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# avx2 = yes/no --- -mavx2 --- Use Intel Advanced Vector Extensions 2
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# avxvnni = yes/no --- -mavxvnni --- Use Intel Vector Neural Network Instructions AVX
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# avx512 = yes/no --- -mavx512bw --- Use Intel Advanced Vector Extensions 512
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# vnni256 = yes/no --- -mavx512vnni --- Use Intel Vector Neural Network Instructions 256
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# vnni512 = yes/no --- -mavx512vnni --- Use Intel Vector Neural Network Instructions 512
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# neon = yes/no --- -DUSE_NEON --- Use ARM SIMD architecture
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# dotprod = yes/no --- -DUSE_NEON_DOTPROD --- Use ARM advanced SIMD Int8 dot product instructions
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#
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# Note that Makefile is space sensitive, so when adding new architectures
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# or modifying existing flags, you have to make sure there are no extra spaces
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@ -116,7 +117,7 @@ ifeq ($(ARCH), $(filter $(ARCH), \
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x86-64-vnni512 x86-64-vnni256 x86-64-avx512 x86-64-avxvnni x86-64-bmi2 \
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x86-64-avx2 x86-64-sse41-popcnt x86-64-modern x86-64-ssse3 x86-64-sse3-popcnt \
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x86-64 x86-32-sse41-popcnt x86-32-sse2 x86-32 ppc-64 ppc-32 e2k \
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armv7 armv7-neon armv8 apple-silicon general-64 general-32 riscv64))
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armv7 armv7-neon armv8 armv8-dotprod apple-silicon general-64 general-32 riscv64))
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SUPPORTED_ARCH=true
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else
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SUPPORTED_ARCH=false
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@ -140,6 +141,7 @@ avx512 = no
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vnni256 = no
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vnni512 = no
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neon = no
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dotprod = no
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arm_version = 0
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STRIP = strip
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@ -308,11 +310,21 @@ ifeq ($(ARCH),armv8)
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arm_version = 8
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endif
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ifeq ($(ARCH),armv8-dotprod)
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arch = armv8
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prefetch = yes
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popcnt = yes
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neon = yes
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dotprod = yes
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arm_version = 8
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endif
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ifeq ($(ARCH),apple-silicon)
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arch = arm64
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prefetch = yes
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popcnt = yes
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neon = yes
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dotprod = yes
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arm_version = 8
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endif
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@ -675,6 +687,10 @@ ifeq ($(neon),yes)
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endif
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endif
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ifeq ($(dotprod),yes)
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CXXFLAGS += -march=armv8.2-a+dotprod -DUSE_NEON_DOTPROD
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endif
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### 3.7 pext
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ifeq ($(pext),yes)
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CXXFLAGS += -DUSE_PEXT
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@ -776,6 +792,7 @@ help:
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@echo "armv7 > ARMv7 32-bit"
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@echo "armv7-neon > ARMv7 32-bit with popcnt and neon"
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@echo "armv8 > ARMv8 64-bit with popcnt and neon"
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@echo "armv8-dotprod > ARMv8 64-bit with popcnt, neon and dot product support"
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@echo "e2k > Elbrus 2000"
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@echo "apple-silicon > Apple silicon ARM64"
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@echo "general-64 > unspecified 64-bit"
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@ -72,6 +72,10 @@ namespace Stockfish::Eval::NNUE::Layers {
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const __m64 Zeros = _mm_setzero_si64();
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const auto inputVector = reinterpret_cast<const __m64*>(input);
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# elif defined(USE_NEON_DOTPROD)
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constexpr IndexType NumChunks = ceil_to_multiple<IndexType>(InputDimensions, 16) / 16;
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const auto inputVector = reinterpret_cast<const int8x16_t*>(input);
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# elif defined(USE_NEON)
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constexpr IndexType NumChunks = ceil_to_multiple<IndexType>(InputDimensions, 16) / 16;
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const auto inputVector = reinterpret_cast<const int8x8_t*>(input);
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@ -123,6 +127,14 @@ namespace Stockfish::Eval::NNUE::Layers {
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sum = _mm_add_pi32(sum, _mm_unpackhi_pi32(sum, sum));
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output[i] = _mm_cvtsi64_si32(sum);
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# elif defined(USE_NEON_DOTPROD)
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int32x4_t sum = {biases[i]};
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const auto row = reinterpret_cast<const int8x16_t*>(&weights[offset]);
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for (IndexType j = 0; j < NumChunks; ++j) {
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sum = vdotq_s32(sum, inputVector[j], row[j]);
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}
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output[i] = vaddvq_s32(sum);
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# elif defined(USE_NEON)
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int32x4_t sum = {biases[i]};
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const auto row = reinterpret_cast<const int8x8_t*>(&weights[offset]);
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@ -187,6 +199,9 @@ namespace Stockfish::Eval::NNUE::Layers {
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#elif defined (USE_SSSE3)
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static constexpr IndexType InputSimdWidth = 16;
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static constexpr IndexType MaxNumOutputRegs = 8;
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#elif defined (USE_NEON_DOTPROD)
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static constexpr IndexType InputSimdWidth = 16;
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static constexpr IndexType MaxNumOutputRegs = 8;
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#elif defined (USE_NEON)
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static constexpr IndexType InputSimdWidth = 8;
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static constexpr IndexType MaxNumOutputRegs = 8;
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@ -292,6 +307,15 @@ namespace Stockfish::Eval::NNUE::Layers {
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#define vec_add_dpbusd_32x2 Simd::m128_add_dpbusd_epi32x2
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#define vec_hadd Simd::m128_hadd
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#define vec_haddx4 Simd::m128_haddx4
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#elif defined (USE_NEON_DOTPROD)
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using acc_vec_t = int32x4_t;
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using bias_vec_t = int32x4_t;
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using weight_vec_t = int8x16_t;
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using in_vec_t = int8x16_t;
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#define vec_zero {0}
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#define vec_add_dpbusd_32x2 Simd::dotprod_m128_add_dpbusd_epi32x2
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#define vec_hadd Simd::neon_m128_hadd
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#define vec_haddx4 Simd::neon_m128_haddx4
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#elif defined (USE_NEON)
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using acc_vec_t = int32x4_t;
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using bias_vec_t = int32x4_t;
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@ -346,6 +346,19 @@ namespace Stockfish::Simd {
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#endif
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#if defined (USE_NEON_DOTPROD)
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[[maybe_unused]] static void dotprod_m128_add_dpbusd_epi32x2(
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int32x4_t& acc,
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int8x16_t a0, int8x16_t b0,
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int8x16_t a1, int8x16_t b1) {
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acc = vdotq_s32(acc, a0, b0);
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acc = vdotq_s32(acc, a1, b1);
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}
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#endif
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#if defined (USE_NEON)
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[[maybe_unused]] static int neon_m128_reduce_add_epi32(int32x4_t s) {
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