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Add AVX-VNNI support for Alder Lake and later.
In their infinite wisdom, Intel axed AVX512 from Alder Lake chips (well, not entirely, but we kind of want to use the Gracemont cores for chess!) but still added VNNI support. Confusingly enough, this is not the same as VNNI256 support. This adds a specific AVX-VNNI target that will use this AVX-VNNI mode, by prefixing the VNNI instructions with the appropriate VEX prefix, and avoiding AVX512 usage. This is about 1% faster on P cores: Result of 20 runs ================== base (./clang-bmi2 ) = 3306337 +/- 7519 test (./clang-vnni ) = 3344226 +/- 7388 diff = +37889 +/- 4153 speedup = +0.0115 P(speedup > 0) = 1.0000 But a nice 3% faster on E cores: Result of 20 runs ================== base (./clang-bmi2 ) = 1938054 +/- 28257 test (./clang-vnni ) = 1994606 +/- 31756 diff = +56552 +/- 3735 speedup = +0.0292 P(speedup > 0) = 1.0000 This was measured on Clang 13. GCC 11.2 appears to generate worse code for Alder Lake, though the speedup on the E cores is similar. It is possible to run the engine specifically on the P or E using binding, for example in linux it is possible to use (for an 8 P + 8 E setup like i9-12900K): taskset -c 0-15 ./stockfish taskset -c 16-23 ./stockfish where the first call binds to the P-cores and the second to the E-cores. closes https://github.com/official-stockfish/Stockfish/pull/3824 No functional change
This commit is contained in:
Gian-Carlo Pascutto
Joost VandeVondele
parent
c1f9a359e8
commit
c9977aa0a8
2 changed files with 34 additions and 5 deletions
26
src/Makefile
26
src/Makefile
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@ -78,6 +78,7 @@ endif
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# ssse3 = yes/no --- -mssse3 --- Use Intel Supplemental Streaming SIMD Extensions 3
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# sse41 = yes/no --- -msse4.1 --- Use Intel Streaming SIMD Extensions 4.1
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# avx2 = yes/no --- -mavx2 --- Use Intel Advanced Vector Extensions 2
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# avxvnni = yes/no --- -mavxvnni --- Use Intel Vector Neural Network Instructions AVX
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# avx512 = yes/no --- -mavx512bw --- Use Intel Advanced Vector Extensions 512
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# vnni256 = yes/no --- -mavx512vnni --- Use Intel Vector Neural Network Instructions 256
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# vnni512 = yes/no --- -mavx512vnni --- Use Intel Vector Neural Network Instructions 512
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@ -100,8 +101,8 @@ endif
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# explicitly check for the list of supported architectures (as listed with make help),
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# the user can override with `make ARCH=x86-32-vnni256 SUPPORTED_ARCH=true`
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ifeq ($(ARCH), $(filter $(ARCH), \
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x86-64-vnni512 x86-64-vnni256 x86-64-avx512 x86-64-bmi2 x86-64-avx2 \
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x86-64-sse41-popcnt x86-64-modern x86-64-ssse3 x86-64-sse3-popcnt \
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x86-64-vnni512 x86-64-vnni256 x86-64-avx512 x86-64-avxvnni x86-64-bmi2 \
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x86-64-avx2 x86-64-sse41-popcnt x86-64-modern x86-64-ssse3 x86-64-sse3-popcnt \
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x86-64 x86-32-sse41-popcnt x86-32-sse2 x86-32 ppc-64 ppc-32 e2k \
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armv7 armv7-neon armv8 apple-silicon general-64 general-32))
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SUPPORTED_ARCH=true
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@ -122,6 +123,7 @@ sse2 = no
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ssse3 = no
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sse41 = no
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avx2 = no
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avxvnni = no
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avx512 = no
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vnni256 = no
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vnni512 = no
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@ -192,6 +194,17 @@ ifeq ($(findstring -avx2,$(ARCH)),-avx2)
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avx2 = yes
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endif
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ifeq ($(findstring -avxvnni,$(ARCH)),-avxvnni)
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popcnt = yes
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sse = yes
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sse2 = yes
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ssse3 = yes
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sse41 = yes
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avx2 = yes
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avxvnni = yes
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pext = yes
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endif
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ifeq ($(findstring -bmi2,$(ARCH)),-bmi2)
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popcnt = yes
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sse = yes
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@ -544,6 +557,13 @@ ifeq ($(avx2),yes)
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endif
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endif
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ifeq ($(avxvnni),yes)
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CXXFLAGS += -DUSE_VNNI -DUSE_AVXVNNI
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ifeq ($(comp),$(filter $(comp),gcc clang mingw))
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CXXFLAGS += -mavxvnni
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endif
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endif
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ifeq ($(avx512),yes)
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CXXFLAGS += -DUSE_AVX512
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ifeq ($(comp),$(filter $(comp),gcc clang mingw))
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@ -689,6 +709,7 @@ help:
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@echo "x86-64-vnni512 > x86 64-bit with vnni support 512bit wide"
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@echo "x86-64-vnni256 > x86 64-bit with vnni support 256bit wide"
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@echo "x86-64-avx512 > x86 64-bit with avx512 support"
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@echo "x86-64-avxvnni > x86 64-bit with avxvnni support"
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@echo "x86-64-bmi2 > x86 64-bit with bmi2 support"
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@echo "x86-64-avx2 > x86 64-bit with avx2 support"
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@echo "x86-64-sse41-popcnt > x86 64-bit with sse41 and popcnt support"
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@ -837,6 +858,7 @@ config-sanity: net
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@echo "ssse3: '$(ssse3)'"
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@echo "sse41: '$(sse41)'"
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@echo "avx2: '$(avx2)'"
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@echo "avxvnni: '$(avxvnni)'"
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@echo "avx512: '$(avx512)'"
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@echo "vnni256: '$(vnni256)'"
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@echo "vnni512: '$(vnni512)'"
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13
src/simd.h
13
src/simd.h
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@ -46,6 +46,13 @@
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#define USE_INLINE_ASM
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#endif
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// Use either the AVX512 or AVX-VNNI version of the VNNI instructions.
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#if defined(USE_AVXVNNI)
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#define VNNI_PREFIX "%{vex%} "
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#else
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#define VNNI_PREFIX ""
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#endif
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namespace Stockfish::Simd {
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#if defined (USE_AVX512)
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@ -208,7 +215,7 @@ namespace Stockfish::Simd {
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# if defined (USE_VNNI)
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# if defined (USE_INLINE_ASM)
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asm(
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"vpdpbusd %[b], %[a], %[acc]\n\t"
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VNNI_PREFIX "vpdpbusd %[b], %[a], %[acc]\n\t"
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: [acc]"+v"(acc)
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: [a]"v"(a), [b]"vm"(b)
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);
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@ -240,8 +247,8 @@ namespace Stockfish::Simd {
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# if defined (USE_VNNI)
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# if defined (USE_INLINE_ASM)
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asm(
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"vpdpbusd %[b0], %[a0], %[acc]\n\t"
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"vpdpbusd %[b1], %[a1], %[acc]\n\t"
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VNNI_PREFIX "vpdpbusd %[b0], %[a0], %[acc]\n\t"
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VNNI_PREFIX "vpdpbusd %[b1], %[a1], %[acc]\n\t"
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: [acc]"+v"(acc)
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: [a0]"v"(a0), [b0]"vm"(b0), [a1]"v"(a1), [b1]"vm"(b1)
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);
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