mirror of
https://github.com/sockspls/badfish
synced 2025-05-01 17:19:36 +00:00
82bb21dc7a
always selecting AffineTransform specialization for small inputs. A related patch was tested as Initially tested as a simplification STC https://tests.stockfishchess.org/tests/view/6317c3f437f41b13973d6dff LLR: 2.95 (-2.94,2.94) <-1.75,0.25> Total: 58072 W: 15619 L: 15425 D: 27028 Ptnml(0-2): 241, 6191, 15992, 6357, 255 Elo gain speedup test STC https://tests.stockfishchess.org/tests/view/63181c1b37f41b13973d79dc LLR: 2.94 (-2.94,2.94) <0.00,2.00> Total: 184496 W: 49922 L: 49401 D: 85173 Ptnml(0-2): 851, 19397, 51208, 19964, 828 and this patch gained in testing speedup = +0.0071 P(speedup > 0) = 1.0000 on CPU: 16 x AMD Ryzen 9 3950X closes https://github.com/official-stockfish/Stockfish/pull/4158 No functional change
387 lines
12 KiB
C++
387 lines
12 KiB
C++
/*
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Stockfish, a UCI chess playing engine derived from Glaurung 2.1
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Copyright (C) 2004-2022 The Stockfish developers (see AUTHORS file)
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Stockfish is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Stockfish is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef STOCKFISH_SIMD_H_INCLUDED
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#define STOCKFISH_SIMD_H_INCLUDED
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#if defined(USE_AVX2)
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# include <immintrin.h>
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#elif defined(USE_SSE41)
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# include <smmintrin.h>
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#elif defined(USE_SSSE3)
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# include <tmmintrin.h>
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#elif defined(USE_SSE2)
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# include <emmintrin.h>
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#elif defined(USE_MMX)
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# include <mmintrin.h>
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#elif defined(USE_NEON)
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# include <arm_neon.h>
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#endif
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// The inline asm is only safe for GCC, where it is necessary to get good codegen.
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// See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101693
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// Clang does fine without it.
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// Play around here: https://godbolt.org/z/7EWqrYq51
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#if (defined(__GNUC__) && !defined(__clang__) && !defined(__INTEL_COMPILER))
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#define USE_INLINE_ASM
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#endif
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// Use either the AVX512 or AVX-VNNI version of the VNNI instructions.
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#if defined(USE_AVXVNNI)
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#define VNNI_PREFIX "%{vex%} "
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#else
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#define VNNI_PREFIX ""
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#endif
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namespace Stockfish::Simd {
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#if defined (USE_AVX512)
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[[maybe_unused]] static int m512_hadd(__m512i sum, int bias) {
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return _mm512_reduce_add_epi32(sum) + bias;
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}
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/*
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Parameters:
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sum0 = [zmm0.i128[0], zmm0.i128[1], zmm0.i128[2], zmm0.i128[3]]
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sum1 = [zmm1.i128[0], zmm1.i128[1], zmm1.i128[2], zmm1.i128[3]]
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sum2 = [zmm2.i128[0], zmm2.i128[1], zmm2.i128[2], zmm2.i128[3]]
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sum3 = [zmm3.i128[0], zmm3.i128[1], zmm3.i128[2], zmm3.i128[3]]
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Returns:
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ret = [
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reduce_add_epi32(zmm0.i128[0]), reduce_add_epi32(zmm1.i128[0]), reduce_add_epi32(zmm2.i128[0]), reduce_add_epi32(zmm3.i128[0]),
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reduce_add_epi32(zmm0.i128[1]), reduce_add_epi32(zmm1.i128[1]), reduce_add_epi32(zmm2.i128[1]), reduce_add_epi32(zmm3.i128[1]),
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reduce_add_epi32(zmm0.i128[2]), reduce_add_epi32(zmm1.i128[2]), reduce_add_epi32(zmm2.i128[2]), reduce_add_epi32(zmm3.i128[2]),
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reduce_add_epi32(zmm0.i128[3]), reduce_add_epi32(zmm1.i128[3]), reduce_add_epi32(zmm2.i128[3]), reduce_add_epi32(zmm3.i128[3])
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]
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*/
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[[maybe_unused]] static __m512i m512_hadd128x16_interleave(
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__m512i sum0, __m512i sum1, __m512i sum2, __m512i sum3) {
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__m512i sum01a = _mm512_unpacklo_epi32(sum0, sum1);
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__m512i sum01b = _mm512_unpackhi_epi32(sum0, sum1);
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__m512i sum23a = _mm512_unpacklo_epi32(sum2, sum3);
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__m512i sum23b = _mm512_unpackhi_epi32(sum2, sum3);
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__m512i sum01 = _mm512_add_epi32(sum01a, sum01b);
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__m512i sum23 = _mm512_add_epi32(sum23a, sum23b);
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__m512i sum0123a = _mm512_unpacklo_epi64(sum01, sum23);
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__m512i sum0123b = _mm512_unpackhi_epi64(sum01, sum23);
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return _mm512_add_epi32(sum0123a, sum0123b);
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}
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[[maybe_unused]] static __m128i m512_haddx4(
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__m512i sum0, __m512i sum1, __m512i sum2, __m512i sum3,
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__m128i bias) {
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__m512i sum = m512_hadd128x16_interleave(sum0, sum1, sum2, sum3);
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__m256i sum256lo = _mm512_castsi512_si256(sum);
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__m256i sum256hi = _mm512_extracti64x4_epi64(sum, 1);
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sum256lo = _mm256_add_epi32(sum256lo, sum256hi);
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__m128i sum128lo = _mm256_castsi256_si128(sum256lo);
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__m128i sum128hi = _mm256_extracti128_si256(sum256lo, 1);
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return _mm_add_epi32(_mm_add_epi32(sum128lo, sum128hi), bias);
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}
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[[maybe_unused]] static void m512_add_dpbusd_epi32(
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__m512i& acc,
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__m512i a,
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__m512i b) {
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# if defined (USE_VNNI)
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# if defined (USE_INLINE_ASM)
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asm(
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"vpdpbusd %[b], %[a], %[acc]\n\t"
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: [acc]"+v"(acc)
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: [a]"v"(a), [b]"vm"(b)
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);
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# else
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acc = _mm512_dpbusd_epi32(acc, a, b);
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# endif
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# else
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# if defined (USE_INLINE_ASM)
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__m512i tmp = _mm512_maddubs_epi16(a, b);
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asm(
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"vpmaddwd %[tmp], %[ones], %[tmp]\n\t"
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"vpaddd %[acc], %[tmp], %[acc]\n\t"
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: [acc]"+v"(acc), [tmp]"+&v"(tmp)
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: [ones]"v"(_mm512_set1_epi16(1))
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);
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# else
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__m512i product0 = _mm512_maddubs_epi16(a, b);
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product0 = _mm512_madd_epi16(product0, _mm512_set1_epi16(1));
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acc = _mm512_add_epi32(acc, product0);
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# endif
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# endif
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}
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[[maybe_unused]] static void m512_add_dpbusd_epi32x2(
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__m512i& acc,
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__m512i a0, __m512i b0,
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__m512i a1, __m512i b1) {
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# if defined (USE_VNNI)
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# if defined (USE_INLINE_ASM)
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asm(
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"vpdpbusd %[b0], %[a0], %[acc]\n\t"
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"vpdpbusd %[b1], %[a1], %[acc]\n\t"
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: [acc]"+v"(acc)
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: [a0]"v"(a0), [b0]"vm"(b0), [a1]"v"(a1), [b1]"vm"(b1)
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);
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# else
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acc = _mm512_dpbusd_epi32(acc, a0, b0);
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acc = _mm512_dpbusd_epi32(acc, a1, b1);
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# endif
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# else
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# if defined (USE_INLINE_ASM)
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__m512i tmp0 = _mm512_maddubs_epi16(a0, b0);
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__m512i tmp1 = _mm512_maddubs_epi16(a1, b1);
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asm(
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"vpaddsw %[tmp0], %[tmp1], %[tmp0]\n\t"
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"vpmaddwd %[tmp0], %[ones], %[tmp0]\n\t"
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"vpaddd %[acc], %[tmp0], %[acc]\n\t"
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: [acc]"+v"(acc), [tmp0]"+&v"(tmp0)
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: [tmp1]"v"(tmp1), [ones]"v"(_mm512_set1_epi16(1))
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);
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# else
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__m512i product0 = _mm512_maddubs_epi16(a0, b0);
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__m512i product1 = _mm512_maddubs_epi16(a1, b1);
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product0 = _mm512_adds_epi16(product0, product1);
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product0 = _mm512_madd_epi16(product0, _mm512_set1_epi16(1));
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acc = _mm512_add_epi32(acc, product0);
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# endif
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# endif
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}
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#endif
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#if defined (USE_AVX2)
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[[maybe_unused]] static int m256_hadd(__m256i sum, int bias) {
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__m128i sum128 = _mm_add_epi32(_mm256_castsi256_si128(sum), _mm256_extracti128_si256(sum, 1));
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sum128 = _mm_add_epi32(sum128, _mm_shuffle_epi32(sum128, _MM_PERM_BADC));
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sum128 = _mm_add_epi32(sum128, _mm_shuffle_epi32(sum128, _MM_PERM_CDAB));
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return _mm_cvtsi128_si32(sum128) + bias;
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}
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[[maybe_unused]] static __m128i m256_haddx4(
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__m256i sum0, __m256i sum1, __m256i sum2, __m256i sum3,
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__m128i bias) {
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sum0 = _mm256_hadd_epi32(sum0, sum1);
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sum2 = _mm256_hadd_epi32(sum2, sum3);
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sum0 = _mm256_hadd_epi32(sum0, sum2);
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__m128i sum128lo = _mm256_castsi256_si128(sum0);
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__m128i sum128hi = _mm256_extracti128_si256(sum0, 1);
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return _mm_add_epi32(_mm_add_epi32(sum128lo, sum128hi), bias);
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}
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[[maybe_unused]] static void m256_add_dpbusd_epi32(
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__m256i& acc,
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__m256i a,
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__m256i b) {
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# if defined (USE_VNNI)
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# if defined (USE_INLINE_ASM)
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asm(
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VNNI_PREFIX "vpdpbusd %[b], %[a], %[acc]\n\t"
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: [acc]"+v"(acc)
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: [a]"v"(a), [b]"vm"(b)
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);
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# else
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acc = _mm256_dpbusd_epi32(acc, a, b);
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# endif
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# else
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# if defined (USE_INLINE_ASM)
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__m256i tmp = _mm256_maddubs_epi16(a, b);
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asm(
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"vpmaddwd %[tmp], %[ones], %[tmp]\n\t"
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"vpaddd %[acc], %[tmp], %[acc]\n\t"
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: [acc]"+v"(acc), [tmp]"+&v"(tmp)
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: [ones]"v"(_mm256_set1_epi16(1))
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);
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# else
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__m256i product0 = _mm256_maddubs_epi16(a, b);
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product0 = _mm256_madd_epi16(product0, _mm256_set1_epi16(1));
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acc = _mm256_add_epi32(acc, product0);
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# endif
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# endif
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}
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[[maybe_unused]] static void m256_add_dpbusd_epi32x2(
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__m256i& acc,
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__m256i a0, __m256i b0,
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__m256i a1, __m256i b1) {
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# if defined (USE_VNNI)
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# if defined (USE_INLINE_ASM)
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asm(
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VNNI_PREFIX "vpdpbusd %[b0], %[a0], %[acc]\n\t"
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VNNI_PREFIX "vpdpbusd %[b1], %[a1], %[acc]\n\t"
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: [acc]"+v"(acc)
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: [a0]"v"(a0), [b0]"vm"(b0), [a1]"v"(a1), [b1]"vm"(b1)
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);
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# else
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acc = _mm256_dpbusd_epi32(acc, a0, b0);
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acc = _mm256_dpbusd_epi32(acc, a1, b1);
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# endif
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# else
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# if defined (USE_INLINE_ASM)
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__m256i tmp0 = _mm256_maddubs_epi16(a0, b0);
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__m256i tmp1 = _mm256_maddubs_epi16(a1, b1);
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asm(
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"vpaddsw %[tmp0], %[tmp1], %[tmp0]\n\t"
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"vpmaddwd %[tmp0], %[ones], %[tmp0]\n\t"
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"vpaddd %[acc], %[tmp0], %[acc]\n\t"
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: [acc]"+v"(acc), [tmp0]"+&v"(tmp0)
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: [tmp1]"v"(tmp1), [ones]"v"(_mm256_set1_epi16(1))
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);
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# else
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__m256i product0 = _mm256_maddubs_epi16(a0, b0);
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__m256i product1 = _mm256_maddubs_epi16(a1, b1);
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product0 = _mm256_adds_epi16(product0, product1);
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product0 = _mm256_madd_epi16(product0, _mm256_set1_epi16(1));
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acc = _mm256_add_epi32(acc, product0);
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# endif
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# endif
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}
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#endif
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#if defined (USE_SSSE3)
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[[maybe_unused]] static int m128_hadd(__m128i sum, int bias) {
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sum = _mm_add_epi32(sum, _mm_shuffle_epi32(sum, 0x4E)); //_MM_PERM_BADC
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sum = _mm_add_epi32(sum, _mm_shuffle_epi32(sum, 0xB1)); //_MM_PERM_CDAB
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return _mm_cvtsi128_si32(sum) + bias;
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}
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[[maybe_unused]] static __m128i m128_haddx4(
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__m128i sum0, __m128i sum1, __m128i sum2, __m128i sum3,
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__m128i bias) {
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sum0 = _mm_hadd_epi32(sum0, sum1);
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sum2 = _mm_hadd_epi32(sum2, sum3);
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sum0 = _mm_hadd_epi32(sum0, sum2);
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return _mm_add_epi32(sum0, bias);
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}
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[[maybe_unused]] static void m128_add_dpbusd_epi32(
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__m128i& acc,
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__m128i a,
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__m128i b) {
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# if defined (USE_INLINE_ASM)
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__m128i tmp = _mm_maddubs_epi16(a, b);
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asm(
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"pmaddwd %[ones], %[tmp]\n\t"
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"paddd %[tmp], %[acc]\n\t"
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: [acc]"+v"(acc), [tmp]"+&v"(tmp)
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: [ones]"v"(_mm_set1_epi16(1))
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);
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# else
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__m128i product0 = _mm_maddubs_epi16(a, b);
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product0 = _mm_madd_epi16(product0, _mm_set1_epi16(1));
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acc = _mm_add_epi32(acc, product0);
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# endif
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}
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[[maybe_unused]] static void m128_add_dpbusd_epi32x2(
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__m128i& acc,
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__m128i a0, __m128i b0,
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__m128i a1, __m128i b1) {
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# if defined (USE_INLINE_ASM)
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__m128i tmp0 = _mm_maddubs_epi16(a0, b0);
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__m128i tmp1 = _mm_maddubs_epi16(a1, b1);
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asm(
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"paddsw %[tmp1], %[tmp0]\n\t"
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"pmaddwd %[ones], %[tmp0]\n\t"
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"paddd %[tmp0], %[acc]\n\t"
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: [acc]"+v"(acc), [tmp0]"+&v"(tmp0)
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: [tmp1]"v"(tmp1), [ones]"v"(_mm_set1_epi16(1))
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);
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# else
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__m128i product0 = _mm_maddubs_epi16(a0, b0);
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__m128i product1 = _mm_maddubs_epi16(a1, b1);
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product0 = _mm_adds_epi16(product0, product1);
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product0 = _mm_madd_epi16(product0, _mm_set1_epi16(1));
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acc = _mm_add_epi32(acc, product0);
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# endif
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}
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#endif
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#if defined (USE_NEON)
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[[maybe_unused]] static int neon_m128_reduce_add_epi32(int32x4_t s) {
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# if USE_NEON >= 8
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return vaddvq_s32(s);
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# else
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return s[0] + s[1] + s[2] + s[3];
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# endif
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}
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[[maybe_unused]] static int neon_m128_hadd(int32x4_t sum, int bias) {
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return neon_m128_reduce_add_epi32(sum) + bias;
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}
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[[maybe_unused]] static int32x4_t neon_m128_haddx4(
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int32x4_t sum0, int32x4_t sum1, int32x4_t sum2, int32x4_t sum3,
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int32x4_t bias) {
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int32x4_t hsums {
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neon_m128_reduce_add_epi32(sum0),
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neon_m128_reduce_add_epi32(sum1),
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neon_m128_reduce_add_epi32(sum2),
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neon_m128_reduce_add_epi32(sum3)
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};
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return vaddq_s32(hsums, bias);
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}
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[[maybe_unused]] static void neon_m128_add_dpbusd_epi32x2(
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int32x4_t& acc,
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int8x8_t a0, int8x8_t b0,
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int8x8_t a1, int8x8_t b1) {
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int16x8_t product = vmull_s8(a0, b0);
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product = vmlal_s8(product, a1, b1);
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acc = vpadalq_s16(acc, product);
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}
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#endif
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}
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#endif // STOCKFISH_SIMD_H_INCLUDED
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